Alliance is a complete set of free CAD tools and portable libraries for VLSI design. It includes a VHDL compiler and simulator, logic synthesis tools, and automatic place and route tools. . A complete set of portable CMOS libraries is provided, including a RAM generator, a ROM generator and a data-path compiler. . Alliance is the result of more than ten years effort spent at ASIM department of LIP6 laboratory of the Pierre et Marie Curie University (Paris VI, France). . Alliance has been used for research projects such as the 875 000 transistors StaCS superscalar microprocessor and 400 000 transistors IEEE Gigabit HSL Router. . Alliance provides CAD tools covering most of all the digital design flow: * VHDL Compilation and Simulation * Model checking and formal proof * RTL and Logic synthesis * Data-Path compilation * Macro-cells generation * Place and route * Layout edition * Netlist extraction and verification * Design rules checking
Firmware and utilities needed to support high power model rocketry products from Altus Metrum, including TeleMetrum, TeleMini, and TeleDongle. . See http://altusmetrum.org/ for more information.
Arachne-pnr implements the place and route step of the hardware compilation process for FPGAs. It accepts as input a technology-mapped netlist in BLIF format, as output by the Yosys synthesis suite for example. It currently targets the Lattice Semiconductor iCE40 family of FPGAs. Its output is a textual bitstream representation for assembly by the IceStorm icepack command. The output of icepack is a binary bitstream which can be uploaded to a hardware device. . This package contains the binary versions of the chipdb files needed by arachne-pnr
Arachne-pnr implements the place and route step of the hardware compilation process for FPGAs. It accepts as input a technology-mapped netlist in BLIF format, as output by the Yosys synthesis suite for example. It currently targets the Lattice Semiconductor iCE40 family of FPGAs. Its output is a textual bitstream representation for assembly by the IceStorm icepack command. The output of icepack is a binary bitstream which can be uploaded to a hardware device. . Together, Yosys, arachne-pnr and IceStorm provide an fully open-source Verilog-to-bistream tool chain for iCE40 1K and 8K FPGA development. . The authors of arachne-pnr have now prepared its successor 'nextpnr'.
Arduino is an open-source electronics prototyping platform based on flexible, easy-to-use hardware and software. It's intended for artists, designers, hobbyists, and anyone interested in creating interactive objects or environments. . This package will install the integrated development environment that allows for program writing, code verification, compiling, and uploading to the Arduino development board. Example code will also be installed. . Some base AVR libraries will be provided by the depending additional package arduino-core-avr. More libraries can be installed within the IDE itself by calling the libarary manager. This requires a working internet access.
Arduino is an open hardware microcontroller platform. This package contains the minimal set of tools to allow one to program an Arduino. It also contains examples and libraries. For a CLI, see the 'arduino-mk' package. . This package does not include the Java based Integrated Development Environment, which can be found in the 'arduino' package.
This tool is able to parse Arduino Hardware specifications, properly run 'gcc' and produce compiled sketches. . An Arduino sketch differs from a standard C program in that it misses a 'main' (provided by the Arduino core), function prototypes are not mandatory, and libraries inclusion is automagic (you just have to #include them). This tool generates function prototypes and gathers library paths, providing 'gcc' with all the needed '-I' params.
Supported platforms: Mighty 1284p using Optiboot Original Mighty 1284p
Arduino is an open-source electronics prototyping platform based on flexible, easy-to-use hardware and software. It's intended for artists, designers, hobbyists, and anyone interested in creating interactive objects or environments. . This package will install a Makefile to allow for CLI programming of the Arduino platform.
Contains a large number of example structures for analysis with atlc.
atlc is a computer aided design (CAD) package for the design and analysis of electrical transmission lines and directional couplers of totally arbitrary cross section and an arbitrary number of different dielectrics. . By analysis, it is assumed one requires finding the electrical properties of a transmission line or coupler, where the physical dimensions of the device are known. By design, it is assumed one requires a transmission line or coupler to have certain electrical properties and one wishes to find how to physically realise such a structure . atlc likely to be of use to radio amateurs, professional RF engineers, students and academics. . More information on atlc is available at http://atlc.sourceforge.net/
AVaRICE is a program which interfaces the GNU Debugger with the AVR JTAG ICE, and other debuggers, available from Atmel. It connects to gdb via a TCP socket and communicates via gdb's "serial debug protocol". . This protocol allows gdb to send commands like "set/remove breakpoint" and "read/write memory". AVaRICE translates this commands into the Atmel protocol used to control the JTAG ICE (or other) debugger. . Because the GDB-AVaRICE connection is via a TCP socket, the two programs do not need to run on the same machine. . The currently supported debuggers are: . * JTAG ICE mkI * JTAG ICE mkII * AVR Dragon
Avra is an assembler for the Atmel's family of AVR 8-bit RISC microcontrollers. It is mostly compatible with Atmel's own assembler, but adds new features such as better macro support and additional preprocessor directives.
AVRDUDE is an open source utility to download/upload/manipulate the ROM and EEPROM contents of AVR microcontrollers using the in-system programming technique (ISP).
Avrp is a FLASH/EEPROM programmer for Atmel's family of AVR 8-bit RISC microcontrollers. It can also program the Atmel AT89 series microcontrollers. It supports at least four different programming devices including Atmel's own AVR development board and in-circuit programming.
This package can program Atmel AVR microcontrollers and uses PC parallel port to program the device in serial mode. The device can be programmed "in-system". . It comes with a schematic of the hardware required. The hardware was designed to be efficient and inexpensive. Schematic can be found in /usr/share/doc/avrprog/ . For more information, see http://avrprog.sourceforge.net
This is a growing software system for synthesis and verification of binary sequential logic circuits appearing in synchronous hardware designs. ABC combines scalable logic optimization based on And-Inverter Graphs (AIGs), optimal-delay DAG-based technology mapping for look-up tables and standard cells, and innovative algorithms for sequential synthesis and verification. . ABC provides an experimental implementation of these algorithms and a programming environment for building similar applications. Future development will focus on improving the algorithms and making most of the packages stand-alone. This will allow the user to customize ABC for their needs as if it were a tool-box rather than a complete tool.
BOSSA is a flash programming utility for Atmel's SAM family of flash-based ARM microcontrollers. The motivation behind BOSSA is to create a simple, easy-to- use, open source utility to replace Atmel's SAM-BA software. . This package contains the wxWidgets GUI interface to bossa.
BOSSA is a flash programming utility for Atmel's SAM family of flash-based ARM microcontrollers. The motivation behind BOSSA is to create a simple, easy-to- use, open source utility to replace Atmel's SAM-BA software. . This package contains the BOSSA command line interface and interactive shell (i.e., bossac and bossash).
A command-line utility to interact with the Firecracker version of X10's home control devices (wireless home automation to control lights, cameras, appliances via a small transmitter that plugs into the standard RS-232 serial port of a computer). . Also included is rocket launcher, a graphical frontend to bottlerocket. If you want this functionality you should have wish (tk8.3 or tk8.4 - the Tcl/Tk interpreter) installed.
Caneda is an open source Electronic Design Automation (EDA) application focused on easy of use and portability. It's goal is to handle the complete design process from schematic capture, through simulation and into circuit layout and PCB. . The software aims to support all kinds of circuit simulation types, e.g. DC, AC, S-parameter and harmonic balance analysis.
This is a C compiler and related tools for developing firmware for TI/Chipcon RF System on Chip (SOC) parts based on the 8051 processing core. These include at least the CC1110, CC1111, CC2510, and CC2511, CC2530, CC2531, CC2533, CC2543, and CC2544. . This package started as a fork of Debian SDCC 2.9.0-5, motivated both as a workaround for increases in the size of 8051 code generated by later versions of SDCC that cause AltOS to fail to build successfully, and a desire to incorporate support for source-level debugging on real hardware.
Circuit Macros is a set of macros designed by Dwight Aplevich for drawing high quality electric circuits to include in TeX, LaTeX, web or other similar documents.
ckb-next is an open-source driver for Corsair keyboards and mice. It aims to bring the features of Corsair's proprietary CUE software to the Linux and Mac operating systems.
From the upstream website: . A Confluence program can generate digital logic for an FPGA or ASIC platform, or C code for hard real-time software. . Confluence combines the component-based methodologies of Verilog and VHDL with the expressiveness of higher order functional programming. . In comparison to Verilog, VHDL, and C, systems designed in Confluence result in 2X to 10X code reduction, making the source easier to manage and reuse. And because Confluence relies on a correct-by-construction compiler, bugs are reduced--some are prevented altogether--thus reducing the overall verification effort.
Covered is a Verilog code coverage utility that reads in a Verilog design and a generated VCD/LXT dumpfile from that design and generates a coverage file that can be merged with other coverage files or used to create a coverage report. Covered also contains the GUI coverage report utility that reads in a coverage file to allow interactive coverage discovery. Areas of coverage measured by Covered are: line, toggle, memory, combinational logic, FSM state/state-transition and assertion coverage.
CycFX2Prog is a tool for programming the EZ-USB FX2 controller (i.e. downloading 8051 firmware into the RAM of the device) and doing basic endpoint communication for testing purposes.
DFCGen, the Digital Filter Coefficients Generator, assists the engineer in the design of digital filters. It supports the engineer in analysis and synthesis of linear time-invariant time-discrete (LTI) systems from the theoretical point of view. It performs generation of system transfer function coefficients in the Z-domain, based on the type and specific parameters of a chosen system.
A Linux based command-line programmer for Atmel chips with a USB bootloader supporting in-system programming. . This is a mostly Device Firmware Update (DFU)-1.0-compliant user-space application. This program was created because the Atmel FLIP program for flashing devices does not run on Linux and because standard DFU loaders do not work for Atmel chips.
dfu-util is a program that implements the host (PC) side of the USB DFU 1.0 and 1.1 (Universal Serial Bus Device Firmware Upgrade) protocol. . DFU is intended to download and upload firmware to devices connected over USB. It ranges from small devices like micro-controller boards up to mobile phones. With dfu-util you are able to download firmware to your device or upload firmware from it.